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  ? semiconductor components industries, llc, 2014 february, 2014 ? rev. p0 1 publication order number: ncp785b/d ncp785b product preview wide input voltage range 10ma ultra-low iq, high psrr linear regulator with enable pin the ncp785b is a high ? performance linear regulator, offering a very wide operating input voltage range of up to 450 v dc, with an output current of up to 10 ma. ideal for high input voltage applications such as industrial and home metering, home appliances. the ncp785b ldo offers 5% initial accuracy, extremely high ? power supply rejection ratio and ultra ? low quiescent current. it is optimized for high ? voltage operations, making them ideal for harsh environment applications. the device is offered in fixed output voltages 3.3 v, 5.0 v, 12 v and 15 v. ncp785b has an enable pin with internal pull up which allows for easy output voltage on/off control. sot ? 223 package option provides good thermal performance as well as helps to minimize the overall solution size. features ? wide input voltage range: dc: up to 450 v ac: 85 v to 260 v (half ? wave rectifier and 2.2  f capacitor) ? 10 ma guaranteed output current ? ultra low quiescent current: typ. 15  a (v out 5 v) ? 5% accuracy over full load, line and temperature variations ? ultra ? high psrr: 70 db at 60 hz, 90 db at 100 khz ? stable with ceramic output capacitor 22  f mlcc ? thermal shutdown and current limit protection ? available in thermally enhanced sot ? 223 package ? this is a pb ? free device typical applications ? industrial applications, home appliances ? home metering / network application ? off ? line power supplies figure 1. typical applications ncp785b gnd 2.2 f 22 f 15 v ? 450 v 3.3 v, 5 v, en off on ncp785b gnd 2.2 f/ 450 v 22 f 85 vac ? 260 vac en off on c in v in v en v in v out c out v out 12 v, 15 v v en c in v in v in v out c out v out 3.3 v, 5 v, 12 v, 15 v this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information marking diagrams sot ? 223 s suffix case 318e 1 a = assembly location y = year w = work week xxxxx = specific device code  = pb ? free package ayw xxxxx   (note: microdot may be in either location) 23 4 (top view)
ncp785b http://onsemi.com 2 figure 2. simplified internal block diagram enb enb + ? + ? 1.25 v vin vout gnd thermal shutdown en en current limit ncp785b v ref en en table 1. pin function description pin no. (sot ? 223) pin name description 1 vin supply voltage input. connect 1  f capacitor from vin to gnd. 2 en enable pin. allows to turn ? on/off the regulator?s output voltage. pulling the en pin low turns ? off the ncp785b. releasing the en pin allows the internal pull ? up to turn ? on the regulator. this pin should be driven by an open collector output. 3 vout regulator output. connect 10  f or higher mlcc capacitor from vout to gnd. 4 (tab) gnd ground connection. table 2. absolute maximum ratings rating symbol value unit input voltage (note 1) v in ? 0.3 to 700 v output voltage v out ? 0.3 to 18 v enable pin voltage v en ? 0.3 to 5.5 v maximum junction temperature t j(max) 150 c storage temperature t stg ? 55 to 150 c esd capability, human body model (all pins except hv pin no.1) (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. peak 650 v max 1 ms non repeated for 1 s 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latch ? up current maximum rating tested per jedec standard: jesd78. table 3. thermal characteristics rating symbol value unit thermal characteristics, sot ? 223 thermal resistance, junction ? to ? air r  ja 73 c/w
ncp785b http://onsemi.com 3 table 4. electrical characteristics, v out = 3.3 v ( ? 40 c t j 85 c; v in = 340 v; i out = 100  a, c in = 1  f, c out = 22  f, unless otherwise noted. typical values are at t j = +25 c.) (note 3) parameter test conditions symbol min typ max unit operating input voltage dc v in 23 450 v output voltage accuracy t j = 25 c, iout = 100  a, 23 v vin 450 v v out 3.1515 3.3 3.4485 v ? 40 c t j 85 c, iout = 100  a, 23 v vin 450 v v out 3.135 3.3 3.465 v line regulation 23 v vin 450 v, iout = 100  a reg line ? 0.5 0.2 +0.5 % load regulation 100  a i out 10 ma, vin = 23 v reg load ? 1.0 0.6 +1.0 % maximum output current (note 4) 23 v vin 450 v i out 11.5 ma quiescent current i out = 0, 23 v vin 450 v i q 15 26  a ground current (note 4) 23 v vin 450 v 0 < i out 10 ma i gnd 27  a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 1.4 0.8 v en pin pull up current (note 5) vin = 450 v dc i en 5  a en pin voltage (note 6) vin = 450 v dc v en 3.0 3.3 v power supply rejection ratio vin = 340 v dc +1 vpp modulation, iout = 100  a f = 1 khz psrr 70 db output noise f = 10 khz to 100 khz vin = 340 v dc , iout = 100  a v noise 280  vrms thermal shutdown temperature (note 5) temperature increasing from t j = +25 c t sd 145 c thermal shutdown hysteresis (note 5) temperature falling from t sd t sdh ? 10 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 4. a proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the safe operating area. 5. guaranteed by design 6. voltage present at the en pin in case that this pin is left floating. it is generated by the internal en pin pull ? up current.
ncp785b http://onsemi.com 4 table 5. electrical characteristics, v out = 5.0 v ( ? 40 c t j 85 c; v in = 340 v; i out = 100  a, c in = 1  f, c out = 22  f, unless otherwise noted. typical values are at t j = +25 c.) (note 7) parameter test conditions symbol min typ max unit operating input voltage dc v in 24 450 v output voltage accuracy t j = 25 c, iout = 100  a, 24 v vin 450 v v out 4.775 5.0 5.225 v ? 40 c t j 85 c, iout = 100  a, 24 v vin 450 v v out 4.75 5.0 5.25 v line regulation 35 v vin 450 v, iout = 100  a reg line ? 0.5 0.2 +0.5 % load regulation 100  a i out 10 ma, vin = 35 v reg load ? 1.0 0.62 +1.0 % maximum output current (note 8) 24 v vin 450 v i out 12.7 ma quiescent current i out = 0, 24 v vin 450 v i q 15 26  a ground current (note 8) 24 v vin 450 v 0 < i out 10 ma i gnd 27  a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 1.4 0.8 v en pin pull up current (note 9) vin = 450 v dc i en 5  a en pin voltage (note 10) vin = 450 v dc v en 3.0 3.3 v power supply rejection ratio vin = 340 v dc +1 vpp modulation, iout = 100  a f = 1 khz psrr 70 db output noise f = 10 khz to 100 khz vin = 340 v dc , iout = 100  a v noise 280  vrms thermal shutdown temperature (note 9) temperature increasing from t j = +25 c t sd 145 c thermal shutdown hysteresis (note 9) temperature falling from t sd t sdh ? 10 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 7. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 8. a proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the safe operating area. 9. guaranteed by design 10. voltage present at the en pin in case that this pin is left floating. it is generated by the internal en pin pull ? up current.
ncp785b http://onsemi.com 5 table 6. electrical characteristics, v out = 12 v ( ? 40 c t j 85 c; v in = 340 v; i out = 100  a, c in = 1  f, c out = 22  f, unless otherwise noted. typical values are at t j = +25 c.) (note 11) parameter test conditions symbol min typ max unit operating input voltage dc v in 35 450 v output voltage accuracy t j = 25 c, iout = 100  a, 35 v vin 450 v v out 11.46 12 12.54 v ? 40 c t j 85 c, iout = 100  a, 35 v vin 450 v v out 11.4 12 12.6 v line regulation 35 v vin 450 v, iout = 100  a reg line ? 0.5 0.1 +0.5 %/v load regulation 100  a i out 10 ma, vin = 35 v reg load ? 1.0 0.66 +1.0 % maximum output current (note 12) 38 v vin 450 v i out 11.5 ma quiescent current i out = 0, 35 v vin 450 v i q 12 18  a ground current (note 12) 35 v vin 450 v 0 < i out 10 ma i gnd 19  a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 1.4 0.8 v en pin pull up current (note 13) vin = 450 v dc i en 5  a en pin voltage (note 14) vin = 450 v dc v en 3.0 3.3 v power supply rejection ratio vin = 340 v dc +1 vpp modulation, iout = 100  a f = 1 khz psrr 70 db output noise f = 10 khz to 100 khz vin = 340 v dc , iout = 100  a v noise 280  vrms thermal shutdown temperature (note 13) temperature increasing from t j = +25 c t sd 145 c thermal shutdown hysteresis (note 13) temperature falling from t sd t sdh ? 10 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 11. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 12. a proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the safe operating area. 13. guaranteed by design 14. voltage present at the en pin in case that this pin is left floating. it is generated by the internal en pin pull ? up current.
ncp785b http://onsemi.com 6 table 7. electrical characteristics, v out = 15 v ( ? 40 c t j 85 c; v in = 340 v; i out = 100  a, c in = 1  f, c out = 22  f, unless otherwise noted. typical values are at t j = +25 c.) (note 15) parameter test conditions symbol min typ max unit operating input voltage dc v in 38 450 v output voltage accuracy t j = 25 c, iout = 100  a, 38 v vin 450 v v out 14.325 15 15.675 v ? 40 c t j 85 c, iout = 100  a, 38 v vin 450 v v out 14.25 15 15.75 v line regulation 38 v vin 450 v, iout = 100  a reg line ? 0.5 0.1 +0.5 % load regulation 100  a i out 10 ma, vin = 38 v reg load ? 1.0 0.66 +1.0 % maximum output current (note 16) 38 v vin 450 v i out 11 ma quiescent current i out = 0, 38 v vin 450 v i q 17 27  a ground current (note 16) 38 v vin 450 v 0 < i out 10 ma i gnd 28  a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 1.4 0.8 v en pin pull up current (note 17) vin = 450 v dc i en 5  a en pin voltage (note 18) vin = 450 v dc v en 3.0 3.3 v power supply rejection ratio vin = 340 v dc +1 vpp modulation, iout = 100  a f = 1 khz psrr 70 db output noise f = 10 khz to 100 khz vin = 340 v dc , iout = 100  a v noise 280  vrms thermal shutdown temperature (note 17) temperature increasing from t j = +25 c t sd 145 c thermal shutdown hysteresis (note 17) temperature falling from t sd t sdh ? 10 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 15. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 16. a proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the safe operating area. 17. guaranteed by design 18. voltage present at the en pin in case that this pin is left floating. it is generated by the internal en pin pull ? up current.
ncp785b http://onsemi.com 7 application information the typical application circuit for the ncp785b device is shown below. figure 3. typical application schematic ncp785b v in v out gnd c in 2.2 f c out 22 f v in 15v ? 450v v out 3.3v, 5v, 12v, 15v en v en off on input decoupling (c1) a 1  f capacitor either ceramic or electrolytic is recommended and should be connected close to the input pin of ncp785b. higher value 2.2  f is necessary to keep the input voltage above the required minimum input voltage at full load for ac voltage as low as 85 v with half wave rectifier. output decoupling (c2) the ncp785b regulator does not require any specific equivalent series resistance (esr). thus capacitors exhibiting esrs ranging from a few m  up to 0.5  can be used safely. the minimum decoupling value is 22  f. the regulator accepts ceramic chip capacitors as well as tantalum devices or low esr electrolytic capacitors. larger values improve noise rejection and load transient response. layout recommendations please be sure that the v in and gnd lines are suf ficiently wide. when the impedance of these lines is high, there is a chance to pick up noise or to cause the malfunction of regulator. set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. thermal as power across the ncp785b increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design layout and used package. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature rise for the part. this is stating that when the ncp785b has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. enable operation the enable pin en of the ncp785b will turn on or off the regulator?s output. the threshold limits are covered in the electrical specification section of this data sheet. if the enable function is not used then the en pin should be left disconnected. an internal current source pulls this pin high to a voltage given by the internal resistor divider. the limit of this voltage is mentioned in the electrical specification section of this data sheet. maximum applicable external voltage at this pin from external source is limited to 5.0 v. + ? 1.25 v vin thermal shutdown en en ncp785b en en 5.3 v v ref 500 k  600 k  5  a ordering information: part number output voltage case package marking shiping released pn marking NCP785BST33T3G 3.3 v tbd sot223 ? 4 hvh tbd pcp785bst33t3g xah ncp785bst50t3g 5 v tbd sot223 ? 4 hvj tbd pcp785bst50t3g xaj ncp785bst120t3g 12 v tbd sot223 ? 4 hvk tbd pcp785bst120t3g xak ncp785bst150t3g 15 v tbd sot223 ? 4 hvl tbd pcp785bst150t3g xal
ncp785b http://onsemi.com 8 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue n a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. 1.5 0.059  mm inches  scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0   l l 0.20 ??? ??? 0.008 ??? ??? style 11: pin 1. mt 1 2. mt 2 3. gate 4. mt 2 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp785b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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